/*
********************************************************************************
SIEMENS C513 Special Function Registers (SFR) and SFR-Bits
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PROGRAM 	can be used for all C511/C513 programs
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MODUL NAME	sfr_c513.h
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DESCRIPTION	Include file with SFR and SFR-Bit defintions
		(can be used in combination with reg51.h)
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VERSION 	V1.0
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COMPILER	Keil PK51 Eval V5.02
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DATE		16/10/95
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MODIFICATIONS	none
********************************************************************************
*/

/******************************************************************************/
/*			  SFR Register Definition			      */
/******************************************************************************/
sfr   SSCCON  = 0xE8;	 /* SSC Control Register			      */
sfr   STB     = 0xE9;	 /* SSC Transmit Register			      */
sfr   SRB     = 0xEA;	 /* SSC Receive Register			      */
sfr   SSCMOD  = 0xEB;	 /* SSC Mode Test Register			      */
sfr   SCF     = 0xF8;	 /* SSC Status Register 			      */
sfr   SCIEN   = 0xF9;	 /* SSC Interrupt Enable Register		      */

sfr   T2CON   = 0xC8;	 /* Timer 2 Control Register			      */
sfr   TL2     = 0xCC;	 /* Timer 2 Low Byte				      */
sfr   TH2     = 0xCD;	 /* Timer 2 High Byte				      */
sfr   RC2L    = 0xCA;	 /* Timer 2 Reload/Capture Register, Low Byte	      */
sfr   RC2H    = 0xCB;	 /* Timer 2 Reload/Capture Register, High Byte	      */

/******************************************************************************/
/*			      SFR Bit Definition			      */
/******************************************************************************/
sbit  BRS0    = 0xE8;	   /* SSC Baudrate Select 0			      */
sbit  BRS1    = 0xE9;	   /* SSC Baudrate Select 1			      */
sbit  BRS2    = 0xEA;	   /* SSC Baudrate Select 2			      */
sbit  CPHA    = 0xEB;	   /* SSC Clock Phase Select			      */
sbit  CPOL    = 0xEC;	   /* SSC Clock Polarity Control		      */
sbit  MSTR    = 0xED;	   /* SSC Master/Slave Mode Select		      */
sbit  TEN     = 0xEE;	   /* SSC Transmitter Enable			      */
sbit  SCEN    = 0xEF;	   /* SSC System Enable 			      */
sbit  TC      = 0xF8;	   /* SSC Transmit Complete Flag		      */
sbit  WCOL    = 0xF9;	   /* SSC Write Collision Flag			      */